With the rapid development of the Internet and the expanding of network scale, the network applications become increasingly complicated, and the network traffic increases rapidly. Therefore, a switching system featuring faster speed and larger capacity is required. A switching network, as the core of a large-capacity switching system, usually provides multiple available links from the source port to the destination port to meet the requirements for large-scale traffic switching at high speed. The system dynamically selects available links to transmit packets to the destination port. The system can be a processing unit, a network device, a switching device, a relevant network, or a combination of preceding devices. A packet represents a data unit of any type, including the fixed length cell and variable length packet. Some switching systems may be unavailable due to incorrect links. Therefore, the switching network needs to detect incorrect links and adjust the policy to distribute packets based on the updated link state.
FIG. 1 shows a structure of a typical multi-level multi-plane network in the prior art. The network includes a multi-level switching process. The Switching Element (SE) 1 and SE 3 may be located in one chip or two independent chips. The packet switching process is as follows: A Traffic Manager Ingress (TMI) distributes packets to each switching plane, the SE 1 distributes packets to each SE 2, SE 2 switches packets to SE 3, and then SE 3 switches packets to a Traffic Manager Egress (TME). TMI and TME represent the Traffic Manager (TM) on the uplink and downlink respectively. FIG. 1 shows that multiple available links exist between TMs or between SE 1 and SE 3 of each switching plane.
FIG. 2 is a flowchart of link auto-negotiation in a single-level switching system in the prior art. In the system, link auto-negotiation is implemented by switching the state of a receiving link between TM and SE. The workflow of link auto-negotiation technology is as follows:
The SE judges the state of the link from the TMI to SE based on the accuracy of packets received by the current link a. If the packets are received correctly, the SE determines that the current link a runs normally and sets the link_state a to 1; otherwise, the SE sets the link_state a to 0.
Similarly, the TME judges the state of the link from the SE to TME based on the accuracy of a packet received by the current link b. If the packet is received accurately, the SE determines that the current link b runs normally and sets the link_state b to 1; otherwise, the SE sets the link_state b to 0.
If the values of link_state a or link_state b are equal to 0, it indicates that at least one of two links between the TM and the SE is faulty. Therefore, the TMI closes up the link a and the SE closes up the link b. If the values of link_state a and link_state b are equal to 1, the TMI uncloses the link a and the SE uncloses the link b. If a link is closed up, the TMI does not request the closed up link to transmit packets, and the SE does not arbitrate the closed up link.
In the process of implementing the present invention, the inventor finds the following problems in the prior art: The preceding link auto-negotiation method is only applicable to a single-level switching system. The link negotiation function cannot be implemented in a multi-level multi-plane switching architecture. The TMI or SE 1 may not acquire the state of a link from SE 3 to TME, and this results in blocking of packets due to an invalid link and failed switching of packets. For example, in FIG. 1, assuming that the link from SE 2_0 to SE 3—i is invalid, SE 1_0 fails to switch packets to SE 3—i because the packets are blocked in SE 2_0. However, if SE 1_0 knows that packets fail to be switched to SE 3—i through SE 2_0, SE 1_0 distributes the packets to another SE 2, and this sidesteps the problem caused by an invalid link between SE 2_0 and SE 3—i. 
Therefore, in a multi-level multi-plane switching system, a first level chip must know not only its link connection state and the link connection state of a second level chip, but also the link connection state of the second level chip and a third level chip. Similarly, available links between TMs exist on different switching planes. Therefore, a TMI needs to know whether a link on a plane can arrive at a TME, so that the TMI can adjust the packet distribution policy in time. In one word, a simple and efficient link state detection notification mechanism with high real-time performance is required urgently, so that the SE 1 or TMI can know the link state from a lower level SE to TME to meet the requirements in a multi-level switching system.